ENGR-433 Digital Design (fall 2017)

HW Announcements & Notes (most recent first)

• Note re connecting switches to the FPGA (pdf)
• Lecture notes on memory & counter design (pdf)
• Lecture notes on flip-flop design (pdf)
• Logic Analyzer Demonstration Circuit file (.bit)
• HW7 definition. ________due_11/15/17
• HW6 definition. ________due_10/30/17
• HW5 definition. ________due_10/25/17
• HW4 definition. ________due_10/20/17
• HW3 definition. (pdf)_____due_10/09/17
• Boolean relationships (pdf)
• HW2 partB definition. (pdf)_due_10/02/17
• HW2 partA definition. (pdf)_due_10/02/17
• Lab 1 note re timing (pdf)
• HW1 definition. (pdf)_____due__9/26/17

• VHDL state machine example, multisegment example (pdf)
• Lab 5 clock definition (vhdl)
• Block diagram showing display connection to FIR filter(pdf)
• Bit file to test 8x16 LED array driver, for XCS3e1200 fpga2 board (bit)
• Notes about the 8x16 display and testing (pdf)
• FIR filter coefficients for testing (pdf)

• Binary to 7-segment ROM decoder data (pdf)
• 8x16 LED array display circuit schematic (pdf)
• 8x16 LED array driver block diagram (pdf)
• 8x16 LED display connection details (pdf)
• 8x16 LED display schematic (pdf)
• VHDL listing of the 8x16 LED array driver (vhd)
• Bit file to test 8x16 LED array driver, for XCS3e250 fpga2 board (bit)
• Bit file to test 8x16 LED array driver, for XCS3e1200 fpga2 board (bit)
• Bit file for the 8x16 LED array driver demo, fpga1 board (bit)

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